| 摘要 |
A system timer controls the timing at which a mobile communication device communicates with a base station. The system timer includes a sequencer that executes a set of instructions stored in a sequencer RAM thereby causing a set of control signals to be supplied to a set of components residing in the mobile communication device including, a set of RF hardware devices, a microprocessor and a digital signal processor. The microprocessor or the digital signal processor may alter the order in which the instructions are executed by the sequencer thereby allowing the mobile communication device to communicate in a dynamic multi-slot communication environment. The system timer may include a timebase counter used to synchronize the timing of the mobile communication device with the timing of the base station. A value stored in the timebase counter is incremented at a predefined rate and the value stored in the timebase counter wraps to zero upon reaching a predefined value. The system timer may further include a set of registers for storing a value that may be used to adjust the predefined value at which the timebase counter wraps and for storing a value that may be used to either increment or decrement the value stored in the timebase counter allowing the system timer to remain synchronized with the base station despite movement of the mobile communication device relative to the base station.
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