发明名称 |
Etch selectivity inversion for etching along crystallographic directions in silicon |
摘要 |
Methods for expanding trenches are disclosed. A trench is formed in a substrate having side walls including at least two crystallographic planes. One crystallographic plane is etchable at a faster rate than a second crystallographic plane. A dielectric layer is selectively grown on surfaces of the crystallographic planes such that the dielectric layer includes a greater thickness on one of the crystallographic plane than on the other. The dielectric layer and the substrate are etched such that an etch rate inversion is achieved. That is, the second crystallographic plane is effectively etched at a faster rate than the first crystallographic plane.
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申请公布号 |
US2003003759(A1) |
申请公布日期 |
2003.01.02 |
申请号 |
US20010893157 |
申请日期 |
2001.06.27 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP |
发明人 |
KUDELKA STEPHAN |
分类号 |
H01L21/302;H01L21/306;H01L21/308;H01L21/461;H01L21/8242;(IPC1-7):H01L21/302 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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