发明名称 |
Video signal processor and video signal processing |
摘要 |
<p>A coprocessor is incorporated in a processor comprising a CPU, an instruction cache, a data memory, a bus controller, an interruption control section and a DMA controller. This coprocessor has a parallel sum-of-products arithmetic operation section, a comparator, an I/O register section, and a sum-of-products factor register section. A frame memory, provided on the input side, stores MUSE or NTSC signals digitized per pixel. The DMA is in control of the transfer of data between the input-side frame memory and the data memory as well as the transfer of data between a frame memory provided on the output side and the data memory. Pixel data stored in the data memory is processed according to broadcasting systems by the switching of sum-of-products factors on the basis of software.</p> |
申请公布号 |
EP1271943(A1) |
申请公布日期 |
2003.01.02 |
申请号 |
EP20020022443 |
申请日期 |
1994.04.12 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
NINOMIYA, KAZUKI;YOSHIOKA, SHIROU;NISHIYAMA, TAMOTSU;MIYAKE, JIRO;HASEGAWA, KATSUYA |
分类号 |
H04N5/46;H04N5/907;H04N7/015;H04N9/64;(IPC1-7):H04N5/46;G06T1/20;H04N9/78;H04N5/14 |
主分类号 |
H04N5/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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