Digital filter

摘要

A digital decimation filter includes a set of cascaded integrator stages for generating a first signal comprised of bit words including a first number of bits as well as a set of cascaded derivative stages for receiving said first signal and generating therefrom an output comprised of bit words including a second number of bits. The second number of bits is smaller than said first number of bits and a bit discarding unit is located downstream of the integrator stages and upstream of the derivative stages for discarding a given number of least significant bits from the bit words of the first signal before this is received by the derivative stages. Said given number is defined as the difference between said first and said second number of bits.