发明名称 Prototype development system
摘要 A prototype development apparatus includes a logic board (LB) including a plurality of integrated circuit (IC) sites each adapted to receive an IC, logic traces coupled to each of the IC sites, and a plurality of logic board connector sites (LBCSs) configured to provide access to a number of the logic traces and each adapted to receive a connector. Additionally, a mezzanine board (MB) has a plurality of mezzanine board connector sites (MBCSs) each adapted to receive a connector and configured to provide access to a number of mezzanine traces interconnecting the LBCSs. The MB board is coupled to the LB and a portion of the logic traces are coupled to a portion of the mezzanine traces. In another embodiment the MB does not have any active components. This is because in this embodiment, the MB is configured to connect the pins of the connector sites according to a predetermined program. A method of prototyping a target circuit generates a netlist representative of the target circuit, divides the netlist into portions to be programmed into ICs on the LB and portions to be fabricated on the MB, such that the target circuit is configured from both the LB and the MB. Advantages of the present invention include providing a cost-effective technique for developing a prototype that combines the advantages of the custom prototype speed with the flexibility of the re-programmable emulators.
申请公布号 US6502221(B1) 申请公布日期 2002.12.31
申请号 US19990351783 申请日期 1999.07.12
申请人 NVIDIA CORPORATION 发明人 VOGEL ERNEST P.;NICOLINO, JR. SAM J.;HASSLEN, III ROBERT J.;MARTINEZ FERNANDO G.
分类号 G06F17/50;H05K1/00;H05K1/14;H05K3/00;H05K3/36;H05K7/00;(IPC1-7):G06F17/50 主分类号 G06F17/50
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