发明名称 Circuit configuration for measuring the capacitance of structures in an integrated circuit
摘要 A circuit configuration for measuring the capacitance of structures in an integrated circuit having a test structure and a reference structure, includes first and second series circuits, each having two transistors connected in series and connected in parallel between supply terminals each providing one supply potential. The test structure is connected to a coupling node of the transistors of the first series circuit. The reference structure is connected to a coupling node of the transistors of the second series circuit. The supply terminals of the series circuits are connected to a controllable voltage source. A voltage-dependent differential capacitance measurement can be carried out on the test structure by using the circuit configuration.
申请公布号 US6501283(B2) 申请公布日期 2002.12.31
申请号 US20010761804 申请日期 2001.01.16
申请人 INFINEON TECHNOLOGIES AG 发明人 LINDOLF JUERGEN;SCHATT STEFANIE
分类号 G01R27/26;G01R31/28;(IPC1-7):G01R27/26 主分类号 G01R27/26
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