发明名称 |
RECORDING HEAD SUBSTRATE, RECORDING HEAD, RECORDING HEAD CARTRIDGE AND ITS RECORDER |
摘要 |
PURPOSE: To eliminate erroneous operation by reducing the difference of delay time between a data signal and a clock signal incident to lowering of the voltage of a logic power supply. CONSTITUTION: The recording head substrate for inputting a data signal (DATA) in synchronism with a clock signal (CLK) comprises an input terminal 105 for inputting the clock signal and the data signal, a register 104 for receiving the data signal in synchronism with the clock signal inputted from the input terminal 105 and holding the data signal, and a section 910 provided between the input terminal 105 and the register 104 and regulating the delay time of at least one of the clock signal or the data signal.
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申请公布号 |
KR20020096899(A) |
申请公布日期 |
2002.12.31 |
申请号 |
KR20020032835 |
申请日期 |
2002.06.12 |
申请人 |
CANON KABUSHIKI KAISHA |
发明人 |
FURUKAWA TATSUO;HIRAYAMA NOBUYUKI;IMANAKA YOSHIYUKI |
分类号 |
B41J2/01;B41J2/05;B41J2/14;(IPC1-7):B41J2/01 |
主分类号 |
B41J2/01 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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