发明名称 Stackable semiconductor package having conductive layer and insulating layers and method of fabrication
摘要 A semiconductor package includes a substrate and a semiconductor die wire bonded, or alternately flip chip bonded, to the substrate. The substrate includes three separate layers including a conductive layer having a pattern of conductive traces, a first insulating layer covering the conductive traces, and a second insulating layer covering the die. The insulating layers also include planar surfaces having external contacts, and conductive vias in electrical communication with the external contacts and with the conductive traces. The external contacts have matching patterns, such that the package can be stacked on a substantially identical package to form a stacked electronic assembly. In addition, the packages in the stacked assembly can have different circuit configurations, and can perform different functions in the assembly. A method for fabricating the package includes the steps of providing the conductive layer having the conductive traces, attaching the die to the conductive traces, forming the first insulating layer on the conductive layer, forming the second insulating layer on the die, forming the conductive vias through the insulating layers, and then forming the external contacts on the planar surfaces of the insulating layers.
申请公布号 US6501165(B1) 申请公布日期 2002.12.31
申请号 US20020161839 申请日期 2002.06.03
申请人 MICRON TECHNOLOGY, INC. 发明人 FARNWORTH WARREN M.;WOOD ALAN G.;BROOKS MIKE
分类号 H01L25/10;(IPC1-7):H01L23/12 主分类号 H01L25/10
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