| 摘要 |
<p>Low resistant vias are formed by sequentially treating an opening (26) in an interlayer dielectric (23,25) and the exposed surface of a lower metal feature (20) with an NH3 plasma (200)followed by a N2/H2 plasma (300), thereby removing any oxide (27) on the metal surface and removing residual polymers or polymeric deposits (28) generated during etching to form the opening. Embodiments include forming a dual damascene (26) opening in a low-k interlayer dielectric (23, 25) exposing the upper surface of a lower Cu or Cu alloy feature 20, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma (200) and then with a N2/H2 plasma (300), Ar sputter etching (400), depositing a barrier layer (50) lining the opening, depositing a seedlayer (52) and filing the opening with Cu or a Cu alloy (53).</p> |
