| 摘要 |
<p>A bit-stream converter (104) capable of converting a first synchronous compressed bit-stream of data at a first sampling rate to second synchronous compressed bit-stream frame of data at a second sampling rate is disclosed. The bit-stream converter architecture may include a payload length detector (304) and a zero stuffing unit in signal communication with the payload length detector. The zero stuffing unit (306) is capable of zero stuffing section responsive to the payload length detector detecting the payload length.</p> |
