| 摘要 |
<p>A method for manufacturing a structure leading to realization of a power management semiconductor device and an analog semiconductor device that can be manufactured at low cost in a short manufacturing term, operate on low voltage with low power consumption, and having a high drivability and a sophisticated function with high precision. The method for manufacturing a P-type polycide structure which is a multilayer one of a P-type polycrystalline silicon layer and a refractory metal silicide layer, in which the conductivity type of the gate electrode of the CMOS is the P-type whether the CMOS is either an NMOS or a PMOS. The resistors used in a voltage-dividing circuit and a CR circuit are formed of polycrystalline silicon in a layer different from the layer of the gate electrode and have high accuracy.</p> |
