VIDEO SIGNAL PROCESSING CIRCUIT

摘要

PROBLEM TO BE SOLVED: To enable a television receiver to share one memory in a three- dimensional Y/C separation employing a burst lock clock and a scanning line interpolation processing employing a line lock clock as a system clock. SOLUTION: The difference between the number of the burst lock clocks and the number of the line lock clocks for one horizontal period is calculated. Phase correction is applied to a video signal on the basis of the difference. Thus, the three-dimensional Y/C separation can be conducted by using the line lock clock to share the memory in common.