| 摘要 |
PURPOSE: An information processing system is provided to make the flight time of a clock signal identical to that of a data signal so that it can stably operate a Rambus DRAM mounted in a memory module though an operation frequency gets higher. CONSTITUTION: The system comprises a memory controller(110), and the first and second RIMM(Rambus in-line memory module, 120, 130). The memory controller(110) and the first and second RIMM(120, 130) are connected to a data bus(140), a clock line(150) and a reference voltage line(160). The clock line(150) has a closed loop structure comprising the first clock line segment(151) and the second clock line segment(152). Each clock line segments(151, 152) include a U-turn portion, the first terminal and the second terminal. The first terminals of both the clock line segments(151, 152) are commonly connected to a clock generator(170). The second terminals of both the clock line segments(151, 152) are connected to a terminal voltage via a terminal resistor. Accordingly, the distance between the clock generator(170) and the terminal resistor is identical to a length of the data bus(140), and each length of the clock line segments(151, 152) is also identical to a length of the data bus(140). As a result, the flight time of the clock signal gets identical to that of the data signal.
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