发明名称 |
Transistor fabrication method |
摘要 |
A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.
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申请公布号 |
US2002197838(A1) |
申请公布日期 |
2002.12.26 |
申请号 |
US20020224220 |
申请日期 |
2002.08.20 |
申请人 |
CHITTIPEDDI SAILESH;KOOK TAEHO;KORNBLIT AVINOAM |
发明人 |
CHITTIPEDDI SAILESH;KOOK TAEHO;KORNBLIT AVINOAM |
分类号 |
H01L21/285;H01L21/336;(IPC1-7):H01L21/476;H01L21/320;H01L21/44;H01L21/823 |
主分类号 |
H01L21/285 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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