发明名称 Control of bias voltage
摘要 The invention concerns a method for maintaining an optimal operating point of an LDMOS device (32) stable, said LDMOS device (32) producing an output signal including an error signal component (err). The method comprises separating said error signal component (err) from the output signal of said LDMOS device (32) and using said error signal component (err) for controlling the gate-to-source bias voltage, or Vgs, of said LDMOS device (32) to maintain the optimal operating point of said LDMOS device (32) stable.
申请公布号 US2002196083(A1) 申请公布日期 2002.12.26
申请号 US20020169196 申请日期 2002.06.28
申请人 LUNDELL JONAS 发明人 LUNDELL JONAS
分类号 H03F1/30;H03F1/32;(IPC1-7):H03F1/30 主分类号 H03F1/30
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