Cache memory system having block replacement function

摘要

A cache memory system includes a tag RAM storing tags in a plurality of sets thereof, a data RAM storing data in a plurality of sets corresponding to the tag RAM sets, and a control logic controlling overall functions in the cache memory. The control logic generates set selection signals which designate the sets storing data replaceable with those of the data RAM in accordance with N-bit data representing a replacement condition of data stored in the data RAM sets. The control logic is composed of counters generating the set selection signals synchronous with a predetermined clock signal in order to modify the sets replaceable data in a random order, so that block replacement logic is constructed in a more simplified form though the number of sets increases in a set-associative cache memory.