发明名称 Timing signal generating system and receiving circuit for transmitting signals at high speed with less circuitry
摘要 A timing signal generating system has a clock signal generating circuit, a synchronizing circuit, a phase code recognizing circuit, and a calibration circuit. The clock signal generating circuit generates at least one first clock signal upon receipt of at least one reference clock signal by controlling an output phase thereof with a digital code signal. The synchronizing circuit hands over signals between a group of circuits operated by the first clock signal and an internal circuit operated by a second clock signal. The phase code recognizing circuit recognizes a phase code when the phases of the first clock signal and of the second clock signal are in a particular relationship. The calibration circuit calibrates a relationship between a value of the recognized phase code and a phase difference between the first and second clock signals. The synchronizing circuit is controlled by using phase code data calibrated by the calibration circuit.
申请公布号 US2002196889(A1) 申请公布日期 2002.12.26
申请号 US20020077875 申请日期 2002.02.20
申请人 FUJITSU LIMITED 发明人 TAMURA HIROTAKA;KIBUNE MASAYA
分类号 H04L7/00;G06F1/04;G06F5/06;(IPC1-7):H03D3/24 主分类号 H04L7/00
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