发明名称 |
Semiconductor memory device |
摘要 |
The semiconductor memory device of the present invention is provided with a switching element comprised of a single channel MOS transistor at a halfway of a path used to transmit a high voltage supplied to the memory array via the external terminal at the time of a test performance, so that the switching element is turned off when a word line is changed to another, thereby resetting of the supply voltage having been required conventionally for each test performance is omitted.
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申请公布号 |
US2002196672(A1) |
申请公布日期 |
2002.12.26 |
申请号 |
US20020144036 |
申请日期 |
2002.05.14 |
申请人 |
HITACHI, LTD. |
发明人 |
HONMA KAZUKI;WADA MASASHI;KUWAHARA SHUICHI |
分类号 |
G01R31/28;G01R31/3185;G11C16/02;G11C29/12;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C7/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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