发明名称 |
IMAGE PROCESSOR |
摘要 |
PROBLEM TO BE SOLVED: To provide an image processor which can obtain an image of good quality by suppressing variance in frequency characteristics with address position generated when an image is enlarged or reduced by performing interpolation processing. SOLUTION: The image processor is provided with an LUT 108 which previously contains (m) (m: natural number) interpolation coefficients to be multiplied by (m) adjacent pixels for the interpolation processing corresponding to the pixels of a source image and (n) (n: natural number) address positions obtained by dividing the gap between the pixels by (n), a generated address setting circuit 110 which sets an address position to be generated according to set magnification, and a coefficient generator 107 which selects an interpolation coefficient stored in a reference table according to the address position set by the generated address setting part. |
申请公布号 |
JP2002374407(A) |
申请公布日期 |
2002.12.26 |
申请号 |
JP20010182228 |
申请日期 |
2001.06.15 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TAKADA SHINICHI;FUJII TOSHIYA |
分类号 |
G06T3/40;H04N1/393;H04N5/228;H04N5/262;H04N101/00;(IPC1-7):H04N1/393 |
主分类号 |
G06T3/40 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|