HIGH MOBILITY FETS USING AL2O3 AS A GATE OXIDE

摘要

A method of forming a high-k dielectric material which exhibits a substantially lower amount of trap charge within a gate stack region is provided. The method maintains high-temperatures (250° C. or above) such that the substrate wafer is not cooled during the various processing steps. Such a method leads to the formation of a high-k dielectric material which does not exhibit a hysteric behavior in a capacitance-voltage curve as well as an increased mobility on FETs using conventional CMOS processing.