| 摘要 |
PROBLEM TO BE SOLVED: To provide a synchronizing signal processing circuit which makes it hard for a sampling error to occur when a vertical synchronizing signal is sampled with a horizontal synchronizing signal. SOLUTION: A vertical synchronizing signal sampling circuit 11 samples the vertical synchronizing signal VD with 0 and 1/2 phases of the horizontal synchronizing signal HD and a vertical synchronizing signal sampling circuit 12 samples it with 1/4 and 3/4 phases. A selector 13 selects the outputs of the vertical synchronizing signal sampling circuits 11 and 12. A line counter 14 counts lines in a vertical period and a comparing circuit 15 compares the number of lines before a current field with the number of lines of the current field. A control circuit 16 performs control to switch the selection of the selector 13 when a difference between the number of lines before the field and the number of lines of the current field is detected.
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