| 摘要 |
A circuit for generating a double-edged POWERGOOD signal to a P6 processor after power-up. After a power supply circuit asserts a signal which indicates that computer system power supply voltages are stable and within threshold levels, the circuit drives the POWERGOOD signal high. A first period later, the circuit drives the POWERGOOD signal back low. The POWERGOOD signal is maintained low for a second predetermined period. Finally, the circuit drives the POWERGOOD signal back high again, and the POWERGOOD signal is maintained high for as long as the power supply circuit indicates that computer system power supply voltages are stable.
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