发明名称 Method for shorting pin grid array pins for plating
摘要 A method, system and structure for a pin grid or pad grid array structure includes a plurality of pins connected to an electronic structure, a power plane within the electronic structure electrically connected to power pins, a ground plane within the electronic structure, and fuse portions electrically connecting the ground plane to ground pins and signal pins. The power plane and the ground plane create a charge in the pins during electroplating of the pins. The fuse portions disconnecting the signal pins from the ground plane after the electroplating.
申请公布号 US6497805(B2) 申请公布日期 2002.12.24
申请号 US20010758324 申请日期 2001.01.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LAKE ARDEN S.;LOPERGOLO EMANUELE F.;SULLIVAN JOSEPH M.
分类号 C25D7/00;G01R3/00;H01L21/48;H01L23/58;(IPC1-7):C25D5/00;C25D5/02;C25D3/58;C25D17/00;C25B9/00 主分类号 C25D7/00
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