发明名称 Low jitter integrated phase locked loop with broad tuning range
摘要 System and method for providing low noise signal having a broad tuning range (1 GHz to 10 GHz, or larger), with associated jitter no more than about 10 percent of the selected period of a target output signal. In a first stage, a ring-based VCO phase locked loop system provides a broad tuning range with some associated noise, and a second stage in a first state is relatively transparent, with no substantial differential attenuation based on frequency. After phase lock is achieved, the second stage is switched to a second state with low associated noise and high differential attenuation based on input signal frequency.
申请公布号 US6498538(B1) 申请公布日期 2002.12.24
申请号 US20010870877 申请日期 2001.05.30
申请人 LATTICE SEMICONDUCTOR CORPORATION 发明人 QU MING;ZHAO JI
分类号 H03L7/095;H03L7/099;H03L7/107;H03L7/18;(IPC1-7):H03L7/095;H03L7/10;H03L7/08 主分类号 H03L7/095
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