| 摘要 |
An apparatus may include a first plurality of registers, each register in the first plurality of registers configured to store data wordss, a first selector coupled to the first plurality of registers, the first selector configured to receive a data words stored in each register in the first plurality of registers, and configured to output the data words from a selected register from the first plurality of registers in response to a selection signal, a second plurality of registers, each register in the second plurality of registers configured to store a pointer associated with each register in the first plurality of registers, a second selector coupled to the second plurality of registers, the selector circuit configured to receive data from each register in the second plurality of registers, and configured to output data from a selected register from the second plurality of registers in response to the selection signal, the data comprising a pointer associated with the selected register from the first plurality of registers, a shift register coupled to the first selector and to the second selector circuit, the shift register configured to receive the data words from the selected register in the first plurality of registers, configured to receive the pointer, and configured to output a portion of the data words, the portion of the data words determined by the pointer, and a decoder coupled to the shift register, the decoder configured to receive the portion of the data words, and configured to output decoded data in response to the portion of the data words.
|
