发明名称 TEST DEVICE FOR SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To prohibit over-write-in and over-erasure of data with a bit unit in testing a function of a memory device such as a flash memory or the like. SOLUTION: A logic comparing circuit 50 which is provided individually for each bit on a bit line of an address to be tested of a DUT 4 judges coincidence/uncoincidence with a bit unit, when it coincides, a bit coincidence signal is held in a loop circuit L and outputs it during retry, when a bit coincidence signal is outputted, a bit control driver 60 prohibits write-in operation and erasure operation for the bit.</p>
申请公布号 JP2002367394(A) 申请公布日期 2002.12.20
申请号 JP20010177418 申请日期 2001.06.12
申请人 ADVANTEST CORP 发明人 OKAZAKI TADASHI
分类号 G01R31/28;G01R31/3183;G11C16/02;G11C29/00;G11C29/56;(IPC1-7):G11C29/00;G01R31/318 主分类号 G01R31/28
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