| 摘要 |
PROBLEM TO BE SOLVED: To provide a sample/hold(S/H) circuit, with which there is no error caused by parasitic capacitance in the input side of a buffer amplifier and current consumption is not enlarged. SOLUTION: When a switching signal SW is 'H', TG 3a and 5b are turned on and an input voltage IN is applied through the TG 3a to a capacitor 4a and a differential input part 10a. At such a time, a voltage follower circuit is configured by connecting the differential input part 10b with an output part 20 through the TG 5b and a voltage held in a capacitor 4b is outputted from an output terminal 7 as an output voltage OUT. When the switching signal SW becomes 'L', TG 3b and 5a are turned on, a voltage follower circuit is composed of the differential input part 10a and the output part 20, and a voltage held on the input side of the capacitor 4a and the differential input part 10a is outputted from the output terminal 7 as an output voltage OUT.
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