| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor memory in which the number of times of verifying is less, a time of a write-in cycle including verifying or an erasure cycle is short, and power consumption is less. SOLUTION: In a memory cell array MCA, a plurality of dielectric films comprising a discrete level for storing information as quantity of captured electric charges have a plurality of memory cells laminated between a semiconductor in which a channel is formed and a control electrode. A column control circuit CC accesses to a memory cell of which the number is less than the number of memory cells in a write-in unit (e.g. memory cell connected to one word line) with which write-in is performed simultaneously, verification and read-out are performed, depending on the result, it is decided whether write-in (or erasure) is performed correctly in a corresponding write-in unit or not. A memory cell performing this verification/read-out may be provided separately, or a memory cell of one part of the memory cell array MCA can be used.</p> |
