发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To make read-out operation high S/N in an MRAM using a memory cell storing information utilizing variation of magnetic resistance of an MTJ element. SOLUTION: A memory cell is constituted by comprising an MTJ element and a bipolar transistor QMC. Read-out operation is performed by current- amplifying a current IWL flowing the MTJ element by the bipolar transistor by selecting a word line WL and outputting it to a read-out data line DR. Thereby, high S/N read-out operation can be performed, a semiconductor device having an MRAM having high speed, high integration, and high reliability.
申请公布号 JP2002367365(A) 申请公布日期 2002.12.20
申请号 JP20010176465 申请日期 2001.06.12
申请人 HITACHI LTD 发明人 SAKATA TAKESHI;HANZAWA SATORU;MATSUOKA HIDEYUKI;WATANABE KATSURO;ITOU AKITOMO
分类号 G11C11/14;G11C11/15;G11C11/16;H01L21/8246;H01L27/105;H01L27/22;H01L43/08 主分类号 G11C11/14
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