发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To improve wiring reliability by enabling burying of conductive material into a fine connection hole to enable plug formation corresponding to fine wiring when the conductive material is buried into both a wiring groove and the connection hole simultaneously to form a wiring structure. SOLUTION: The method includes steps of forming a connection hole 13 to be connected to a substrate 11 and a wiring groove 14 a bottom of which is to be connected to a top end of the connection hole 13 on an inter-layer insulating film 12 covering the substrate 11, forming a first conductive material layer 15 so as to bury at least the hole 13 and groove 14, leaving the layer 15 in the interior of the hole 13 and removing the other excessive first layer 15, forming a second conductive material layer 18 so as to bury at least the groove 14, and leaving the second layer 18 in the interior of the groove 14 and removing the other excessive second layer 18.
申请公布号 JP2002368081(A) 申请公布日期 2002.12.20
申请号 JP20010170474 申请日期 2001.06.06
申请人 SONY CORP 发明人 SHIBUKI SHUNICHI
分类号 C25D7/12;C23C28/00;C23C28/02;C23C30/00;H01L21/28;H01L21/302;H01L21/306;H01L21/3065;H01L21/3205;H01L21/768;(IPC1-7):H01L21/768;H01L21/320 主分类号 C25D7/12
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