发明名称 PEAK HOLD CIRCUIT
摘要 PROBLEM TO BE SOLVED: To easily add a peak hold function by a Burton amplifier. SOLUTION: When an input voltage Vi rises, a gate voltage VQ1 G of an MOS transistor Q1 is increased, the base current of a transistor Q3 flows, the transistor Q3 is turned into active state, a capacitor C is charged with electric charges, an output voltage Vo rises and a stable state is provided on the condition of Vi=Vo. When the input voltage Vi falls, since the gate voltage of the MOS transistor Q1 falls, the base current of a transistor Q13 flows inversely, the base voltage of the transistor Q13 is decreased and the drain-source voltage of an MOS transistor Q2 is reduced but since the transistor Q2 is an MOS transistor, diode operation is not performed between the gate and the source. Therefore, the discharging route of the capacitor C is limited by the current value of a third current source 23 and by controlling such a current value, hold time can be set.
申请公布号 JP2002368591(A) 申请公布日期 2002.12.20
申请号 JP20010176485 申请日期 2001.06.12
申请人 SONY CORP 发明人 MOROHASHI HIDEO;SAIJO KAZUYUKI;TANABE SHINICHI
分类号 H03K5/1532;G11C27/00 主分类号 H03K5/1532
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