发明名称 DATA PROCESSING BY MULTIPLE INSTRUCTION SETS
摘要 PROBLEM TO BE SOLVED: To improve the performance of an N-bit data passage while raising the code density for an application in a data processor using many pairs of instruction sets. SOLUTION: Two instruction sets use the complete N-bit data passage in a processor core 2 to control the processing. One instruction set is an instruction set of 32-bit instructions, and the other is an instruction set of 16-bit instructions. Both instruction sets are permanently set, and relevant hardware 30, 36, and 38 which decode the instructions are provided.
申请公布号 JP2002366348(A) 申请公布日期 2002.12.20
申请号 JP20000365503 申请日期 2000.11.30
申请人 ARM LTD 发明人 JAGGAR DAVID V
分类号 G06F9/30;G06F9/318;G06F9/38;G06F15/00;(IPC1-7):G06F9/30 主分类号 G06F9/30
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