发明名称 Host- fabrec adapter having an efficient multi-tasking pipelined instruction execution micro-controller subsystem for NGIO/infinibandTM applications
摘要 A host system is provided with one or more host-fabric adapters installed therein for connecting to a switched fabric of a data network. The host-fabric adapter may comprise at least one Micro-Engine (ME) arranged to establish connections and support data transfers, via a switched fabric, in response to work requests from a host system for data transfers; interface blocks arranged to interface the switched fabric and the host system, and send/receive work requests and/or data messages for data transfers, via the switched fabric, and configured to provide context information needed for said Micro-Engine (ME) to process work requests for data transfers, via the switched fabric, wherein the Micro-Engine (ME) is implemented with a pipelined instruction execution architecture to handle one or more ME instructions and/or one or more tasks in parallel in order to process data messages.
申请公布号 US2002191599(A1) 申请公布日期 2002.12.19
申请号 US20010835132 申请日期 2001.03.30
申请人 PARTHASARATHY BALAJI;GASBARRO DOMINIC J. 发明人 PARTHASARATHY BALAJI;GASBARRO DOMINIC J.
分类号 G06F9/30;G06F9/38;H04L12/56;H04L29/06;(IPC1-7):H04L12/56;H04L12/28;G06F9/00 主分类号 G06F9/30
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