发明名称 Apparatus and method for bus power measurement in a digital signal processor
摘要 In order to measure the power consumed by a bus in a digital signal processor, each bus conductor has a lead electrically coupled thereto. The lead is coupled to apparatus that provides a signal each time the logic state of the bus is changed. The total number of logic signal changes for a given period of time is determined. Because power is consumed by the bus only during logic state transitions, the total number of logic state transitions can be multiplied by the power consumed by the bus during each transition to provide the total power consumed during a predetermined period of time. The power consumed by the bus during each logic state transition can be determined by simulation or other techniques. The power consumed by the operation of the bus can be further divided into power consumed by the internal (on-chip) bus and the external (off-chip) bus.
申请公布号 US2002194510(A1) 申请公布日期 2002.12.19
申请号 US20010920180 申请日期 2001.08.01
申请人 SWOBODA GARY L. 发明人 SWOBODA GARY L.
分类号 G06F1/32;G06F11/34;(IPC1-7):G06F1/26;G06F1/28;G06F1/30 主分类号 G06F1/32
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