发明名称 Method of fabricating a redundant pinout configuration for signal enhancement in an IC package
摘要 A semiconductor device assembly package includes a semiconductor device having components thereon which are generic to a variety of applications by manipulation of the pinout configuration. The lead frame includes redundant leads for connection to the semiconductor device, as desired. The semiconductor device may include redundant wire bond pads, each redundant pair including one pad on a lateral edge and one pad on a non-lateral edge of the die. In applications requiring less than all of the available leads, the pinout configuration of the leadframe is adjusted to use the extra space from unused NC leads and missing pins for providing wider, shorter leads with reduced inductance, and wider paddle arms for reduced bending and breakage.
申请公布号 US2002192873(A1) 申请公布日期 2002.12.19
申请号 US20020219840 申请日期 2002.08.14
申请人 CORISIS DAVID J. 发明人 CORISIS DAVID J.
分类号 H01L23/495;H01L23/50;(IPC1-7):H01L23/495;H01L23/48 主分类号 H01L23/495
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