发明名称 Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
摘要 In one aspect, the invention provides a method of forming an integrated circuitry memory device. In one preferred implementation, a conductive layer is formed over both memory array areas and peripheral circuitry areas. A refractory metal layer is formed over the conductive layer to provide conductive structure in both areas. According to a preferred aspect of this implementation, the conductive layer which is formed over the memory array provides an electrical contact for a capacitor container to be formed. According to another preferred aspect of this implementation, the conductive layer formed over the peripheral circuitry area constitutes a conductive line which includes at least some of the silicide. In another preferred implementation, the invention provides a method of forming a capacitor container over a substrate. According to a preferred aspect of this implementation, a conductive layer is elevationally interposed between an upper insulating layer and a lower conductive layer over the substrate. The upper insulating layer is etched relative to the interposed conductive layer to form a capacitor container first portion. Subsequently, the interposed conductive layer is etched to form a capacitor container second portion.
申请公布号 US2002192903(A1) 申请公布日期 2002.12.19
申请号 US20020209269 申请日期 2002.07.30
申请人 LANE RICHARD H.;ZAHURAK JOHN K. 发明人 LANE RICHARD H.;ZAHURAK JOHN K.
分类号 H01L21/8239;H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/8239
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