发明名称 Circuit and method for performing multiple modulo mathematic operations
摘要 A multi-function modulo processor architecture is capable of performing multiple modulo mathematic operations. The modulo processor includes a pipeline processing portion that iteratively computes a running partial modulo product using the operands of a modulo mathematic argument to obtain one or more final partial modulo products. The final partial modulo product is post-processed to obtain the final result.
申请公布号 US2002194237(A1) 申请公布日期 2002.12.19
申请号 US20010971325 申请日期 2001.10.04
申请人 TAKAHASHI RICHARD J.;OSUGI KEVIN J. 发明人 TAKAHASHI RICHARD J.;OSUGI KEVIN J.
分类号 G06F7/72;(IPC1-7):G06F7/38 主分类号 G06F7/72
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