发明名称 IN-CIRCUIT TESTING OPTIMIZATION GENERATOR
摘要 <p>A method of generating optimized netlists is provided. The method includes providing an input mechanism that is adapted to receive selective test report files from one or more circuit board test generation software programs and adapted to receive in-circuit test restriction parameters. The method further includes generating netlists based on the received test report files and in-circuit test restriction parameters. The netlists comprise one or more of total number of nets for the board, number of nets that do not require in-circuit test pads, number of nets that possibly require in-circuit test pads, number of in-circuit test pads as test points and edge connector terminals, and number of nets that require in-circuit test pads.</p>
申请公布号 WO2002101553(A2) 申请公布日期 2002.12.19
申请号 IB2002002005 申请日期 2002.06.05
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