发明名称 Signal processing apparatus with three layer processing sections
摘要 <p>A signal processing apparatus is provided which includes upper, intermediate and lower layer processing sections. The lower layer processing section includes a first storage unit having a first memory capacity of a predetermined limited size for transfer data, and storing transfer data. The intermediate layer processing section includes a second storage unit having a second memory capacity larger than the limited size for transfer data, and storing the transfer data. The upper layer processing section transmits the transfer data of a size, which is larger than the first memory capacity and which is equal to or smaller than the second memory capacity, to the intermediate layer processing section. The intermediate layer processing section receives the transfer data transmitted from the upper layer processing section, divides the transfer data into a plurality of divided data each having a size equal to or smaller than the limited size for transfer data, and transmits the divided data to the lower layer processing section. If there is untransmitted divided data upon receiving the response signal, the intermediate layer processing section transmits the untransmitted divided data to the lower layer processing section without transmitting any response signal to the upper layer processing section. <IMAGE></p>
申请公布号 EP1032177(A3) 申请公布日期 2002.12.18
申请号 EP20000301491 申请日期 2000.02.24
申请人 SEIKO EPSON CORPORATION 发明人 KUROSE, MITSUKAZU;HANAOKA, KUNIHIRO;AKASHITA, SHOJI;TOMIOKA, OSAMU
分类号 H04L29/10;H04L12/40;H04L12/64;H04L12/801;H04L12/911;H04L12/951;H04L29/06;H04L29/08;(IPC1-7):H04L29/06 主分类号 H04L29/10
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