A system for phase-locking a clock to a digital audio signal embedded in a digital video signal

摘要

A system for phase-locking a clock to a digital audio signal embedded within in a digital video signal uses an audio extractor, frequency dividers, and an adjusted bandwidth loop filter to prevent phase jitter associated with the digital audio signal preventing the functionality of the phase-lock loop or having unacceptable effects on the generated audio sample frequency signal. Extracted audio samples are divided down and input to a phase detector. The signal is then filtered using a series of loop filters, one of which has an adjusted bandwidth to reject phase jitter. A clock then outputs the generated synthesized audio sample frequency using the output from the series of loop filters, and the synthesized frequency signal is looped back through a second frequency divider to the phase detector.