| 摘要 |
PROBLEM TO BE SOLVED: To provide a digitally controlled oscillator, having a function of receiving from a sleep mode. SOLUTION: Feedback loops 304, 308, 310, 312, 318 receive an oscillation signal from an adjustable frequency loop, detect an error of the oscillation signal and generate an error signal, based on the error. An integrated and control logic receives the error signal from the feedback loops and maintains the oscillation signal to be within a specified error range. When the digital controlled oscillator is power-reduced temporarily, it holds a previous operation status of the adjustable frequency loop. When the digital controlled oscillator is power-increased, after being temporarily power downed, the integrated control logic starts the adjustable frequency loop from the previous operation status, based on the data held in the apparatus, thereby re-starting the feedback loops and an error processor circuit to avoid the oscillator adjustment, based on old data. |
