METHOD OF MAKING LOADLESS FOUR-TRANSISTOR MRMORY CELL WITH DIFFERENT GATE INSULATION THICKNESSES FOR N-CHANNEL DRIVE TRANSISTORS AND P-CHANNEL ACCESS TRANSISTORS

摘要

A memory cell has a pair of n-ch drive MOS transistors, a pair of p-ch access MOS transistors. The access MOS transistor supply electric charge to storage nodes of the drive MOS transistors without using a resistive load. The gate insulation films of the drvie MOS transistors have a thickness lower than the thickness of the gate insulation films of the access MOS transistors for achieving stable and high-speed operation of the memory cell.