发明名称 |
Dual gate logic device |
摘要 |
The present invention features double- or dual-gate logic devices that contain gate conductors that are consistently self-aligned and that have channels that are of constant width. The inventive process also provides a method of selectively etching germanium-containing gate conductor materials without significantly etching the adjacent silicon channel material. In this manner, the gate conductor can be encased in a dielectric shell without changing the length of the silicon channel. A single-crystal silicon wafer is utilized as the channel material. Pillars or stacks of self aligned dual gate MOSFETs are generated by etching, via the juxtaposition of overlapping germanium-containing gate conductor regions. Vertically etching through regions of both gate conducting material and dielectric insulating material provides an essentially perfect, self-aligned dual gate stack. A process is described wherein the gate conductor material can be selectively etched without etching the channel material.
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申请公布号 |
US2002187610(A1) |
申请公布日期 |
2002.12.12 |
申请号 |
US20010879590 |
申请日期 |
2001.06.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FURUKAWA TOSHIHARU;HAKEY MARK C.;HOLMES STEVEN J.;HORAK DAVID V.;MA WILLIAM H. |
分类号 |
H01L21/76;H01L21/02;H01L21/28;H01L21/336;H01L21/762;H01L21/8234;H01L27/08;H01L27/088;H01L27/12;H01L29/78;H01L29/786;(IPC1-7):H01L21/336;H01L21/823 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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