发明名称 LSI DESIGN METHOD HAVING DUMMY PATTERN GENERATING STEP AND LCR EXTRACTING STEP, AND COMPUTER PROGRAM FOR IMPLEMENTING THE METHOD
摘要 PURPOSE: To simplify a step of extracting the capacitance between adjacent wiring patterns by suppressing fluctuations in a pattern density within a connection wiring layer. CONSTITUTION: In a connection wiring layer in an LSI, a conductive dummy pattern continuous in a direction perpendicular to adjacent wiring patterns extended in one direction is inserted between the adjacent wiring patterns spaced by a first distance from the adjacent wiring patterns. Due to such dummy pattern insertion, fluctuations in the pattern density within the connection wiring layer can be suppressed and fluctuations in a pattern width in an etching step can be suppressed. Further, since the conductive dummy pattern is continuous in the direction perpendicular to the wiring patterns, the capacitance between the adjacent wiring patterns within the same wiring layer becomes constant corresponding to the first distance, regardless of the distance between the adjacent wiring patterns. Accordingly, even when distances between the adjacent wiring patterns are different, the capacitance between the adjacent wiring patterns can be extracted as a constant value and a step of extracting the capacitance C in an LCR extracting step can be simplified.
申请公布号 KR20020092783(A) 申请公布日期 2002.12.12
申请号 KR20020003301 申请日期 2002.01.21
申请人 FUJITSU LIMITED 发明人 OHBA HISAYOSHI;WATANABE JUN
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L27/04 主分类号 G06F17/50
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