| 摘要 |
PURPOSE: A method for manufacturing a transistor having elevated source and drain regions is provided to restrain a junction leakage current and to reduce a sheet resistance by preventing the increasement of salicide thickness at interface between an isolation layer and the source/drain region. CONSTITUTION: A semiconductor substrate(31) having an isolation layer(33) is prepared. A transistor including elevated source and drain regions(43) is formed on the semiconductor substrate(31). That is, a gate oxide layer(35) and a gate electrode(37) are sequentially formed on an active region of the substrate(31). After forming an insulating spacer(38) at both sidewalls of the gate electrode(37), the elevated source and drain regions(43) are formed on the active region of the substrate. Impurity ions for restraining salicide formation are implanted into an interface between the isolation layer(33) and the elevated source/drain regions(43). Then, a salicide layer is formed at the source/drain region(43). Molybdenum(Mo) ion is used as the impurity ion for restraining salicide formation.
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