发明名称 |
Enhanced debug scheme for LBIST |
摘要 |
A device for fault testing in a microprocessor chip provides a LBIST circuit which has a first reference signature. A loading unit is further provided for receiving and outputting a set of masking data. A file unit connected to the loading unit is yet further provided for receiving the masking data. A masking unit connected to the file unit is yet further provided for generating a second reference signature based on the masking data from the file unit and a scanning data from a scan string in the chip. And, a signature logic connected to the output of the masking unit is yet further provided for compressing the second reference signature and inputting the compressed second reference signature to the LBIST circuit, wherein the compressed second reference signature replaces the first reference signature.
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申请公布号 |
US2002188903(A1) |
申请公布日期 |
2002.12.12 |
申请号 |
US20010876753 |
申请日期 |
2001.06.07 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION, ARMONK, NEW YORK |
发明人 |
CHU SAM GAT-SHANG;CLABES JOACHIM GERHARD;GOULET MICHAEL NORMAND;LEBLANC JOHNNY J.;WARNOCK JAMES DOUGLAS |
分类号 |
G01R31/317;G01R31/3185;G01R31/3187;G06F11/27;(IPC1-7):G06F11/00 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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