发明名称 Reading out, storing binary memory cell signals involves connecting binary intermediate signal to main data line pair(s) depending on line control signal, outputting via main data line pair
摘要 The method involves applying a binary memory cell signal(s) to a bit line pair(s), connecting the signal to a detection amplifier(s) depending on a cell field control signal(s), connecting a binary output signal to a local data line pair as a binary intermediate signal depending on a column control signal, connecting the intermediate signal to a main data line pair(s) depending on a line control signal and outputting a binary output signal. The method involves applying at least one binary memory cell signal to at least one bit line pair (201t,201b), connecting the signal to at least one detection amplifier (202-0 to 202-7) depending on at least one cell field control signal, connecting a binary output signal to a local data line pair as a binary intermediate signal depending on a column control signal, connecting the intermediate signal to at least one main data line pair depending on a line control signal and outputting a binary output signal
申请公布号 DE10124753(A1) 申请公布日期 2002.12.12
申请号 DE20011024753 申请日期 2001.05.21
申请人 INFINEON TECHNOLOGIES AG 发明人 PFEFFERL, PETER;SAVIGNAC, DOMINIQUE;SCHNEIDER, HELMUT;CHRYSOSTOMIDES, ATHANASIA;KLING, SABINE
分类号 G11C7/06;(IPC1-7):G11C7/06 主分类号 G11C7/06
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