METHOD FOR GENERATING INTERNAL CLOCKS IN SEMICONDUCTOR MEMORY DEVICE AND INTERNAL CLOCK GENERATION CIRCUIT

摘要

PURPOSE: A method for generating internal clocks in a semiconductor memory device and an internal clock generation circuit are provided to sample correctly data by generating an internal clock synchronized with an external clock. CONSTITUTION: A receiver(10) receives an external clock. A delay compensation circuit(40) receives an output clock of the receiver(10) and delays the received clock during a predetermined time. An external control delay portion(30) delays an output of the delay compensation circuit(40) in response to an external digital code. The first internal clock driver(50) generates an internal clock by driving an output of the external control delay portion(30). The second internal clock driver(51) is installed at a rear end portion of a fixing delay portion(60). The delay compensation circuit(40) is formed with a variable delay line(41), a compensation delay portion(42), a control delay time delay portion(43), and a phase decision portion(44).