发明名称 METHOD FOR FORMING SHALLOW JUNCTION USING SILICON GERMANIUM SELECTIVE EPITAXIAL GROWTH
摘要 <p>PURPOSE: A method for forming shallow junction using silicon germanium selective epitaxial growth is provided to effectively prevent a diffusion of impurities via a gate and a reduction of effective channel length by using an SEG(Selective Epitaxial Growth) of SiGe. CONSTITUTION: A polysilicon gate(22) and a barrier film(23) of a spacer structure are sequentially formed on a silicon substrate(20). After partially removing the polysilicon gate(22) and the silicon substrate(20), a SiGe layer(24) is then grown on the removed region by using an SEG. Lightly doped dopants are implanted to the SiGe layer(24). A nitride spacer(26') is formed at both sidewalls of the barrier film(23). By implanting heavily doped dopants into the SiGe layer(24) and annealing the resultant structure, source and drain regions(27) and a source/drain extension(28) are formed.</p>
申请公布号 KR20020091886(A) 申请公布日期 2002.12.11
申请号 KR20010030683 申请日期 2001.06.01
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHA, HAN SEOP
分类号 H01L21/20;H01L21/336;H01L29/417;(IPC1-7):H01L21/20 主分类号 H01L21/20
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