发明名称 Method for forming a metal capacitor in a damascene process
摘要 This invention provides a method for forming a metal capacitor in a damascene process. Before the thin-film capacitor is formed, the underlying interconnections are fabricated with Cu metal by damascene process. The lower electrode is formed in a dual damascene process, which is also used to form the dual damascene structures comprising wires and plugs. An insulator is disposed to isolate the dual damascene structures with each other. In this dual damascene process, an anti-reflection layer is used and formed on the insulator, and the anti-reflection layer is also used as a hard mask layer, a polishing stop layer and an etching stop layer. Then, another insulator and a metal layer are formed on the anti-reflection layer, and encounter a photolithography step and an etching step to obtain an upper electrode and a capacitor insulator. After forming the metal capacitor, the upper interconnections are fabricated with another dual damascene processes.
申请公布号 US6492226(B1) 申请公布日期 2002.12.10
申请号 US20010880849 申请日期 2001.06.15
申请人 SILICON INTEGRATED SYSTEMS CORP. 发明人 HSUE CHEN-CHIU;LEE SHYH-DAR
分类号 H01L21/02;H01L21/768;(IPC1-7):H01L21/826 主分类号 H01L21/02
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